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technology overview

plastic qual flat no-lead (qfn) and dual flat no-lead（dfn）are a principal package using smd technology. they are widely used in low cost and commercial applications. tfme offers qfn (the package body thickness is 0.30mm to 1.00 mm) with lead counts range from 4 to 64and dfn (the package body thickness is 0.30mm to 1.00 mm) with lead counts 2 to 64.

drqfn(dual row qfn)are more pins with lead counts in smaller pkg size. there are two kinds of drqfn type, punch drqfn and saw drqfn. punch drqfn (the package body thickness is 0.8mm to 0.9mm) with lead counts range from 118 to 164 and saw drqfn (the package body thickness is 0.8mm to 0.9mm) with lead counts range from 76 to 180.

applications

qfn & dfn packages are considered one of the most established industry standard packages. qfn &dfn are commonly used logic, memory, and micro-controllers. application of rf, wi-fi, bluetooth, iot, cellular phones, wireless lan, personal digital assistants, digital cameras, etc.

features

　◆ provide various technological solutions, including fc, wb, clip bond, wbc, sintered silver, smt,etc.

　◆ the thickness of products covered the whole series is 0.30mm to 1.4 mm;

　◆ lead frame design capability to meet per customer,

　　optimize lead frame design, establish drqfn copper selection and pkg size design rules.

　　pb-free process ready and green molding compound;

　◆ excellent reliability and low-cost production solutions;

　◆ material diversification and supply chain stability and security;

test：

　◆ provides a competitive test solution to our customers ranging from test development, platform conversion, and product maintenance and test data analysis.

　◆ has extensive test development experience of various product portfolio, including high-end digital, mix-signal, soc and high-speed products. 

　◆ reduce customer overhead by outsourcing projects / tasks to avoid maintaining a large scale of dedicated team

　◆ incorporate industrial standard through leveraging best known method from our database & continuous cost saving by driving test time reduction, yield improvement

services include

　◆ wafer sort test development

　◆ final test development

　◆ low cost platform conversion

　◆ multi-site enablement

　◆ burn-in capabilities

extensive test development experience in cpu, apu, gpu, chipset, digital audio, baseband, microcontroller, lcd driver, touch panel driver.

key capability

　◆ minimum pkg size: 0.8*0.8mm,maxmum pkg size:12.3*12.3mm

　◆ high-performance qfn pkg with clip bond process,

　◆ saw drqfn,pkg size max: 13*13mm. add de-burr and wet polish(option) assemblyprocess flow to avoid the risk of mold flash and terminal burrs after cutting.

　◆ punch drqfn, pkg size max: 12*12mm,total wires max:1126 wires in mp.

　◆ qfn &dfn wettableflank process capability

　◆ qfn&dfn automotive products line

　◆ the assembly process includes 3rd aoi, strip mapping, defect mark, plasma, x-ray, ir reflow, tc, sat, etc;

　◆ tri-test capability